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基于InP工艺的采样保持电路发展综述
基金项目(Foundation): 国家重点研发计划项目(2024YFF1400302)
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发布时间: 2026-03-20
出版时间: 2026-03-20
网络发布时间: 2026-03-20
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摘要:

针对超高速模数转换器(Analog to Digital Converter, ADC)对前端采样保持电路在带宽、线性度和保持精度方面不断提升的需求,梳理了自2007年以来基于磷化铟异质结双极型晶体管(Indium Phosphide Heterojunction Bipolar Transistor, InP HBT)工艺的采样保持电路研究进展。系统分析了射极跟随器采样结构的非线性、噪声及保持电压衰减机理,总结了典型技术路径。重点比较了双开关反馈结构、基–集结二极管采样结构、fT倍增与有源峰化技术以及发射极电容/电阻退化结构等方案的性能提升效果。文献对比结果表明,InP HBT工艺在高采样率、高线性度及能效平衡方面具有显著优势。未来研究将朝向异质集成、小型化与高能效方向发展,以满足下一代高速数据转换系统的需求。

Abstract:

Driven by the increasing performance requirements of ultra-high-speed analog-to-digital converters (ADCs) for bandwidth, linearity, and hold accuracy in front-end track-and-hold amplifiers (THAs), research progress on THA based on indium phosphide heterojunction bipolar transistor (InP HBT) technology since 2007 is reviewed. The nonlinear characteristics, noise behavior, and hold-voltage droop mechanisms of emitter-follower sampling structures are systematically analyzed, and representative technical approaches are summarized. Performance improvements achieved through dual-switch feedback architecture, base-collector diode sampling structure, fT-doubling and active-peaking techniques, and emitter capacitive/resistive degeneration scheme are comparatively discussed. Literature comparison indicates that InP HBT technology provides significant advantages in achieving high sampling rate, high linearity, and energy efficient balance. Future development is expected to focus on heterogeneous integration, miniaturization, and energy-efficiency enhancement to meet the requirements of next-generation high-speed data-conversion systems.

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基本信息:

中图分类号:TN792

引用信息:

[1]仲易,张益铭,戴军,等.基于InP工艺的采样保持电路发展综述[J].西安邮电大学学报().

基金信息:

国家重点研发计划项目(2024YFF1400302)

发布时间:

2026-03-20

出版时间:

2026-03-20

网络发布时间:

2026-03-20

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